The present invention relates to the formation of a relaxed or pseudo relaxed layer on a substrate, the relaxed layer being in a material selected from among semiconductor materials, in order to form a final structure intended for electronics, optics or optoelectronics. For example, a semiconductor-on-insulator structure may be formed. The present invention comprises in particular the formation of a layer strained on and by the relaxed layer.
A Si layer strained by a relaxed or pseudo-relaxed SiGe layer may achieve advantageous properties such as a charge carrier mobility that is about 100% more significant than that present within a relaxed Si layer. A layer is “relaxed” if its crystalline material has a mesh parameter approximately identical to its nominal mesh parameter, in other words, substantially identical to the mesh parameter of the material in equilibrium. Conversely, the term “strained” is applied to any layer of crystalline material whose crystalline structure is strained resiliently in tension or in compression during crystal growth, such as epitaxy, which forces its mesh parameter to be appreciably different from the nominal mesh parameter.
It is known to form a relaxed layer on a substrate, particularly by implementing a method that includes epitaxy of a thin layer of semiconductor material on a donor substrate, bonding a receiver substrate on the thin layer, and removing the donor substrate. A semiconductor-on-insulator (SOI) structure can be made in this way, in which the semiconductor thickness is formed at least partly by the thin relaxed layer. The insulating layer is usually formed between the epitaxial growth and bonding steps. Relaxation of the thin layer can occur during the epitaxial growth step, or may occur during a subsequent treatment.
In the first case, it is known to use a donor substrate that includes a carrier substrate and a buffer layer. The buffer layer contains plastic deformations so that the covering epitaxial thin layer is relaxed of all strain. Processes for producing such a layer are for example described in U.S. Pat. No. 6,573,126 and in International Publication No. WO 99/53539. However, a buffer layer often takes a relatively long time to fabricate, and is costly to obtain.
In the second case, the donor substrate does not include a buffer layer and then a thin layer is epitaxially grown so that it is strained by the donor substrate. In this way, for example, a SiGe layer will be grown directly on a Si substrate to have a thickness such that the SiGe layer is strained overall.
A first technique for relaxing such a SiGe layer is described in the document by B. Hollander and colleagues entitled “Strain relaxation of pseudomorphic Si1-xGex/Si(100) heterostructures after hydrogen or helium ion implantation for virtual substrate fabrication” (in Nuclear and Instruments and Methods in Physics Research B 175-177 (2001) 357-367). This method includes relaxing the SiGe layer, prior to bonding a receiver substrate onto a thin layer, by implanting hydrogen or helium ions in the Si substrate at a preset depth. However, relaxation rates usually obtained by this technique remain quite low relative to other techniques.
Research into a second technique is disclosed in the document entitled “Compliant Substrates: A comparative study of the relaxation mechanisms of strained films bonded to high and low viscosity” by Hobart and colleagues (Journal of electronic materials, vol 29, No 7, 2000). After removing the donor substrate, thermal treatment is applied to relax or pseudo-relax a strained SiGe layer that has been bonded to a borophosphoro silicate glass (BPSG). During the thermal treatment, the strained layer appears to relax because the layer of glass becomes viscous at the treatment temperature. It would be advantageous to use a layer of BPSG with a fairly low viscosity temperature TG (of the order of 625° C.). However, due to the viscosity of the BPSG layer obtained at these temperatures, subsequent thermal treatments at temperatures above TG, may have undesired effects, particularly on the structure of the treated wafer. Thus, for example, if transistors are made in the relaxed or pseudo-relaxed SiGe layer or in a strained Si layer grown on the relaxed or pseudo-relaxed SiGe layer, at a temperature above TG some of the strains may relax because the layer of glass becomes viscous, which removes strains from the Si layer and adds strains in the SiGe layer. Such a result is contrary to the goal of retaining a relaxed SiGe layer and straining the Si layer as far possible. Thus, improvements in such techniques are desirable and necessary, and these are provided by the present invention.